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无法读/写间隔定时器寄存器 DE1-SoC HPS

如何解决无法读/写间隔定时器寄存器 DE1-SoC HPS

我有一个 DE1-SoC (Cyclone V) 板,我试图在其中获取定时器中断以在 HPS 上工作。我在 Intel FPGA University Program 中找到了一个名为“interrupt_example”的示例,当我在 Intel FPGA Universioty Program 上运行它时,它运行得很完美。

现在我想将这个项目转移到 ARM DS,但我无法让它工作,因为每次当我尝试写入地址 0xFF202000 的间隔定时器时,调试器都不会继续。当我尝试在 ARM DS 中查看 0xFF202000 的内存时,我也看不到任何东西。

我使用相同的编译器 (GCC C 4.7.3 arm-altera-eabi) 并且我尝试使用相同的编译器参数:

英特尔 FPGA 监控程序

rm -f interrupt_example.c.o
arm-altera-eabi-gcc -Wall -c -g -O1 -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 interrupt_example.c -o interrupt_example.c.o
rm -f exceptions.c.o
arm-altera-eabi-gcc -Wall -c -g -O1 -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 exceptions.c -o exceptions.c.o
rm -f HPS_timer_ISR.c.o
arm-altera-eabi-gcc -Wall -c -g -O1 -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 HPS_timer_ISR.c -o HPS_timer_ISR.c.o
rm -f interval_timer_ISR.c.o
arm-altera-eabi-gcc -Wall -c -g -O1 -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 interval_timer_ISR.c -o interval_timer_ISR.c.o
rm -f pushbutton_ISR.c.o
arm-altera-eabi-gcc -Wall -c -g -O1 -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 pushbutton_ISR.c -o pushbutton_ISR.c.o
rm -f interrupt_example.axf

ARM DS

make all
'Building file: ../interrupt_example/HPS_timer_ISR.c'
'Invoking: GCC C Compiler 4.7.3 [arm-altera-eabi]'
arm-altera-eabi-gcc.exe -Dsoc_cv_av -I"C:\CSA\BareMetal_Hex_disco\sw\hps\application\inc" -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include/soc_cv_av -O1 -g3 -Wall -c -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 -MMD -MP -MF"interrupt_example/HPS_timer_ISR.d" -MT"interrupt_example/HPS_timer_ISR.o" -c -o "interrupt_example/HPS_timer_ISR.o" "../interrupt_example/HPS_timer_ISR.c"
'Finished building: ../interrupt_example/HPS_timer_ISR.c'
' '
'Building file: ../interrupt_example/exceptions.c'
'Invoking: GCC C Compiler 4.7.3 [arm-altera-eabi]'
arm-altera-eabi-gcc.exe -Dsoc_cv_av -I"C:\CSA\BareMetal_Hex_disco\sw\hps\application\inc" -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include/soc_cv_av -O1 -g3 -Wall -c -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 -MMD -MP -MF"interrupt_example/exceptions.d" -MT"interrupt_example/exceptions.o" -c -o "interrupt_example/exceptions.o" "../interrupt_example/exceptions.c"
'Finished building: ../interrupt_example/exceptions.c'
' '
'Building file: ../interrupt_example/interval_timer_ISR.c'
'Invoking: GCC C Compiler 4.7.3 [arm-altera-eabi]'
arm-altera-eabi-gcc.exe -Dsoc_cv_av -I"C:\CSA\BareMetal_Hex_disco\sw\hps\application\inc" -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include/soc_cv_av -O1 -g3 -Wall -c -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 -MMD -MP -MF"interrupt_example/interval_timer_ISR.d" -MT"interrupt_example/interval_timer_ISR.o" -c -o "interrupt_example/interval_timer_ISR.o" "../interrupt_example/interval_timer_ISR.c"
'Finished building: ../interrupt_example/interval_timer_ISR.c'
' '
'Building file: ../interrupt_example/pushbutton_ISR.c'
'Invoking: GCC C Compiler 4.7.3 [arm-altera-eabi]'
arm-altera-eabi-gcc.exe -Dsoc_cv_av -I"C:\CSA\BareMetal_Hex_disco\sw\hps\application\inc" -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include/soc_cv_av -O1 -g3 -Wall -c -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 -MMD -MP -MF"interrupt_example/pushbutton_ISR.d" -MT"interrupt_example/pushbutton_ISR.o" -c -o "interrupt_example/pushbutton_ISR.o" "../interrupt_example/pushbutton_ISR.c"
'Finished building: ../interrupt_example/pushbutton_ISR.c'
' '
'Building file: ../.Metadata/.plugins/org.eclipse.cdt.make.core/specs.c'
'Invoking: GCC C Compiler 4.7.3 [arm-altera-eabi]'
arm-altera-eabi-gcc.exe -Dsoc_cv_av -I"C:\CSA\BareMetal_Hex_disco\sw\hps\application\inc" -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include/soc_cv_av -O1 -g3 -Wall -c -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 -MMD -MP -MF".Metadata/.plugins/org.eclipse.cdt.make.core/specs.d" -MT".Metadata/.plugins/org.eclipse.cdt.make.core/specs.o" -c -o ".Metadata/.plugins/org.eclipse.cdt.make.core/specs.o" "../.Metadata/.plugins/org.eclipse.cdt.make.core/specs.c"
'Finished building: ../.Metadata/.plugins/org.eclipse.cdt.make.core/specs.c'
' '
'Building file: ../main.c'
'Invoking: GCC C Compiler 4.7.3 [arm-altera-eabi]'
arm-altera-eabi-gcc.exe -Dsoc_cv_av -I"C:\CSA\BareMetal_Hex_disco\sw\hps\application\inc" -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include/soc_cv_av -O1 -g3 -Wall -c -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 -MMD -MP -MF"main.d" -MT"main.o" -c -o "main.o" "../main.c"
'Finished building: ../main.c'
' '

我也使用相同的链接器参数:

英特尔 FPGA 监控程序

arm-altera-eabi-gcc -Wl,--defsym -Wl,arm_program_mem=0x40 -Wl,arm_available_mem_size=0x3fffffb8 -Wl,__cs3_stack=0x3ffffff8 -Wl,--section-start -Wl,.vectors=0x0 -T"C:/intelFPGA_lite/17.0/University_Program/Monitor_Program/build/altera-socfpga-hosted-with-vectors.ld" interrupt_example.c.o exceptions.c.o HPS_timer_ISR.c.o interval_timer_ISR.c.o pushbutton_ISR.c.o -o interrupt_example.axf

ARM DS

arm-altera-eabi-gcc -T "C:\intelFPGA_lite\17.0\University_Program\Monitor_Program\build\altera-socfpga-hosted-with-vectors.ld" --exceptions -Wl,.vectors=0x0 -o "BareMetal_Hex_disco.axf" ./interrupt_example/HPS_timer_ISR.o ./interrupt_example/exceptions.o ./interrupt_example/interval_timer_ISR.o ./interrupt_example/pushbutton_ISR.o ./.Metadata/.plugins/org.eclipse.cdt.make.core/specs.o ./main.o

我也尝试使用相同的预加载器,但是在我编写调试脚本时这不起作用。我不确定这是否是问题所在。如果这确实是问题所在,如果有人能帮我编写另一个调试脚本,我将不胜感激,因为当我尝试使用 u-boot-spl.de1-soc.srec 作为预加载器时,ARM DS 给我带来了问题。>

英特尔 FPGA 监控程序中的预加载器信息

Info: Running Quartus Prime Programmer
Info: Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition
Info: copyright (C) 2017 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools,logic functions
Info: and other software and tools,and its AMPP partner logic
Info: functions,and any output files from any of the foregoing
Info: (including device programming or simulation files),and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement,the Intel Quartus Prime License Agreement,Info: the Intel MegaCore Function License Agreement,or other
Info: applicable license agreement,including,without limitation,Info: that your use is for the sole purpose of programming logic
Info: devices manufactured by Intel and sold by Intel or its
Info: authorized distributors. Please refer to the applicable
Info: agreement for further details.
Info: Processing started: Sun Feb 07 10:04:39 2021
Info: Command: quartus_hps --cable="DE-SoC [USB-1]" -o GDBSERVER --gdbport0=3350 --preloader=C:/intelFPGA_lite/17.0/University_Program/Monitor_Program/arm_tools/u-boot-spl.de1-soc.srec --preloaderaddr=0xffff13a0 --source=C:/Users/red25/Documents/interrupt_example.srec
Current hardware is: DE-SoC [USB-1]
Successfully change hardware frequency to 16Mhz
Found HPS at device 1
Double check JTAG chain
HPS Device IDCODE: 0x4BA00477
AHB Port is located at port 0
APB Port is located at port 1
Double check device identification ...
>>cpu0 halted at 0x2fa8.
>>Resetting HPS.
>>Downloading preloader.....
>>Program loaded. PC set to program entry (0xFFFF0000)
>>Setting vector base address register to: 0xffff0000
>>Running preloader..
>>Preloader successfully run.
>>Downloading user program.
>>Program loaded. PC set to program entry (0x0128)
>>Setting vector base address register to: 0x0
>> Hard breakpoint set.
Starting GDB Server.

ARM DS 中的调试脚本

reset
wait 5s
stop
wait
loadfile "$sdir/../../preloader/uboot-socfpga/spl/u-boot-spl" 0x0
set semihosting enabled true
delete
tbreak spl_boot_device
run
wait
loadfile "$sdir/../Debug/BareMetal_Hex_disco.axf" 0x0
start*

编写 0xFF202000 的代码的反汇编看起来也一样:

英特尔 FPGA 监控程序

Disassembly picture Intel FPGA Monitor Program

ARM DS

Disassembly picture ARM DS

我尝试了我现在能想到的一切。我真的希望有人能帮助我。提前致谢。

编辑: 同时,我发现当程序尝试写入 0xFF202000 时,它在汇编中进入了无限循环。我对汇编不是很熟悉,所以我不确定为什么会发生这种情况。 Endless loop assembly 0xFF202000

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