如何解决适用于mipi-dsi的设备树绑定-Allwinner R16至DLPC3433
我有一个定制板,应该使用来自allwinner R16的MIPI-DSI视频信号,该信号应该由TI DLPC3433接收。
[R16] >>>>>>> MIPI-DSI >>>>>>>> [DLPC3433]
https://linux-sunxi.org/images/b/b3/R16_Datasheet_V1.4_%281%29.pdf
我想正确配置设备树。到目前为止,我还没有完美的迹象表明正在产生任何视频信号。我需要在设备树配置中添加什么才能使其正常运行?我很难准确了解文档和示例。我需要在哪里定义DLPC3433的属性?以及如何定义DLPC3433的属性?
请在下面查看设备树的一部分:
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
clock-frequency = <100000>; /* i2c bus frequency 100 KHz */
status = "okay";
dsi_hdmi_bridge@4d {
compatible = "ite,it6263";
reg = <0x4d>;
reset-gpios = <&pio 4 9 GPIO_ACTIVE_LOW>; /* PE9 */
port {
it6263_in_dsi: endpoint {
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&dsi_out_it6263>;
};
};
};
};
...
&tcon0 {
// compatible = "allwinner,sun8i-a33-tcon";
status = "okay";
};
&dsi {
// compatible = "allwinner,sun6i-a31-mipi-dsi";
status = "okay";
ports {
port@1 {
reg = <1>;
dsi_out_it6263: endpoint {
remote-endpoint = <&it6263_in_dsi>;
};
};
};
};
&dphy {
// compatible = "allwinner,sun6i-a31-mipi-dphy";
status = "okay";
};
这是sun8i-a33.dtsi中设备树包含的内容
dsi: dsi@1ca0000 {
compatible = "allwinner,sun6i-a31-mipi-dsi";
reg = <0x01ca0000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_MIPI_DSI>,<&ccu CLK_DSI_SCLK>;
clock-names = "bus","mod";
resets = <&ccu RST_BUS_MIPI_DSI>;
phys = <&dphy>;
phy-names = "dphy";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dsi_in_tcon0: endpoint {
remote-endpoint = <&tcon0_out_dsi>;
};
};
};
};
dphy: d-phy@1ca1000 {
compatible = "allwinner,sun6i-a31-mipi-dphy";
reg = <0x01ca1000 0x1000>;
clocks = <&ccu CLK_BUS_MIPI_DSI>,<&ccu CLK_DSI_DPHY>;
clock-names = "bus","mod";
resets = <&ccu RST_BUS_MIPI_DSI>;
status = "disabled";
#phy-cells = <0>;
};
fe0: display-frontend@1e00000 {
compatible = "allwinner,sun8i-a33-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DE_FE>,<&ccu CLK_DE_FE>,<&ccu CLK_DRAM_DE_FE>;
clock-names = "ahb","mod","ram";
resets = <&ccu RST_BUS_DE_FE>;
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
};
be0: display-backend@1e60000 {
compatible = "allwinner,sun8i-a33-display-backend";
reg = <0x01e60000 0x10000>,<0x01e80000 0x1000>;
reg-names = "be","sat";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DE_BE>,<&ccu CLK_DE_BE>,<&ccu CLK_DRAM_DE_BE>,<&ccu CLK_BUS_SAT>;
clock-names = "ahb","ram","sat";
resets = <&ccu RST_BUS_DE_BE>,<&ccu RST_BUS_SAT>;
reset-names = "be","sat";
assigned-clocks = <&ccu CLK_DE_BE>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
};
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_drc0: endpoint@0 {
reg = <0>;
remote-endpoint = <&drc0_in_be0>;
};
};
};
};
版权声明:本文内容由互联网用户自发贡献,该文观点与技术仅代表作者本人。本站仅提供信息存储空间服务,不拥有所有权,不承担相关法律责任。如发现本站有涉嫌侵权/违法违规的内容, 请发送邮件至 dio@foxmail.com 举报,一经查实,本站将立刻删除。