如果为静态条件 vhdl

如何解决如果为静态条件 vhdl

我正在用 VHDL 构建神经网络。我在这个项目中有一个简单的问题。首先，我必须使用 for 语句和 if 语句，但我必须将它们与“通用”语法一起使用。我不能使用 for 循环或者 if then 因为端口映射不能在进程中使用。所以我决定对这两种语法都使用通用语句。

    library IEEE;
use IEEE.STD_LOGIC_1164.ALL;



entity mainProje is
    Port ( inputLayer           : in   std_logic_vector (24 downto 0);
           outputLayer          : in   std_logic_vector (3 downto 0));
end mainProje;


architecture Behavioral of mainProje is
    
component addsub32 is
  Port ( addsub_a : in std_logic_vector(31 downto 0);
         addsub_b : in std_logic_vector(31 downto 0);
         addsub_res : out std_logic_vector(31 downto 0) 
  );
end component;

component fp_mulp is
  Port (    multiple_a           : in   std_logic_vector (31 downto 0);
            multiple_b           : in   std_logic_vector (31 downto 0);
            multiple_res : out  std_logic_vector (31 downto 0));
end component;

    signal inputL : std_logic_vector (24 downto 0)  :=(others=>'0');
    
    
    
    signal mulp_out : std_logic_vector (31 downto 0)  :=(others=>'0');
    signal mulp_a : std_logic_vector (31 downto 0)  :=(others=>'0');
    signal mulp_b: std_logic_vector (31 downto 0)  :=(others=>'0');
    
    signal adder_out: std_logic_vector (31 downto 0)  :=(others=>'0');
    signal adder_a: std_logic_vector (31 downto 0)  :=(others=>'0');
    signal adder_b: std_logic_vector (31 downto 0)  :=(others=>'0');
    
    signal sumBuffer : std_logic_vector(31 downto 0):=(others=>'0');

    type inWeights is array(1 to 10,1 to 25) of std_logic_vector(31 downto 0);
    type outWeights is array(1 to 4,1 to 10) of std_logic_vector(31 downto 0);
    
    type inLayerNode is array(1 to 25) of std_logic_vector(31 downto 0);

    signal iWeights : inWeights;
    signal oWeights : outWeights;
    
    signal inLayerN: inLayerNode;
    
begin


    --input Weights
    iWeights(1,1) <=  "00111101001110111011101100011010";-- 0.0458327319962061
    iWeights(1,2) <=  "00111110110001000100100100110001";-- 0.383370910990698
    iWeights(1,3) <=  "10111111001101000111100011110001";-- -0.704970429655861
    iWeights(1,4) <=  "10111110101110001011111001010111";-- -0.360827181637624
    iWeights(1,5) <=  "00111111000010110010100001011101";-- 0.543584647799883
    iWeights(1,6) <=  "10111110010001111101111111110010";-- -0.195190222049452
    iWeights(1,7) <=  "10111110101011000100111110001101";-- -0.336544423789263
    iWeights(1,8) <=  "10111101111010011100101111101000";-- -0.114158454028173
    iWeights(1,9) <=  "00111111000101111111000101000001";-- 0.593525018028288
    iWeights(1,10) <=  "10111110101110100101001010001011";-- -0.36391100592217

    
    
    
    inputL <= inputLayer;

    nodeCalculation: for i in 0 to 9 generate--1 varmı yok mu 1 varsa işlem yapıcaz
        checkOne: if (inputLayer(i) = '1') generate
                    
            mulp_a <= "00111111100000000000000000000000";--
            mulp_b <= iWeights(1,i+1);      
        
            p1: fp_mulp port map(multiple_a => mulp_a,multiple_b => mulp_b,multiple_res => mulp_out);--degeri aldıktan sonra toplama eklenmesi gerek
                    
            adder_a <= mulp_out;
            adder_b <= sumBuffer;
            p2: addsub32 port map(addsub_a => adder_a,addsub_b => adder_b,addsub_res => adder_out);
                    
            sumBuffer <= adder_out;
            end generate checkOne;
            
            
        end generate nodeCalculation;
    

end Behavioral;

我怎样才能克服这个问题？任何建议都可以帮助我。